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Low-cost synthesis approach for reversible authenticator circuits in QCA environment
Bandan Bhoi1, Neeraj Kumar Misra2, Lafifa Jamal3, Manoranjan Pradhan4.
Recently, Quantum-dot Cellular Automata (QCA) based reversible logic circuit has an enormous benefit over CMOS based logic circuit. As a promising technology for Nanoelectronics computing, reversible-QCA has gained more and more attention from researchers around the world. In this paper, a reversible authenticator circuit based on QCA was implemented. This article presents a Nano-authenticator circuit to verify the authenticated and unauthenticated inputs. The proposed QCA designs have been implemented in a different manner from existing designs, which are primarily based on a coplanar design approach. The efficiency of QCA design has been investigated based on parameters such as cell count, area, and latency. Furthermore, missing an additional cell defect of the reversible authenticator has been analyzed, and covers the fault tolerance of 60.41% and 75%, respectively. In addition, the proposed Feynman gate in QCA environment achieves 76.35% area, 12.5% cell count and 95.55% average energy dissipation improvement as compared to the existing layout. Moreover, the new reversible authentication circuit achieves 87.75% cost and 43.54% area improvement in comparison with the previous state-of-art design
Affiliation:
- Veer Surendra Sai University of Technology, India
- Bharat Institute of Engineering and Technology, India
- University of Dhaka, Bangladesh
- Veer Surendra Sai University of Technology, India
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Indexation |
Indexed by |
MyJurnal (2021) |
H-Index
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2 |
Immediacy Index
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0.000 |
Rank |
0 |
Indexed by |
Scopus 2020 |
Impact Factor
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CiteScore (1.3) |
Rank |
Q3 (Electrical and Electronic Engineering)) Q4 (Electronic, Optical and Magnetic Materials) |
Additional Information |
SJR (0.298) |
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