In this research, the author conducted the cost of test study for the wafer-ring test handler in semiconductor’s industry with theory of the firm model. A cost of test model have been developed through the theory of the firm average cost theory by integrated the technology aspect into it so that the cost study can be conduct. The aim of this research is to find out the effectiveness of the wafer-ring test handler in order to reduce the cost of testing. Wafer-ring test handler is the invented technology whichhave been developed for Wafer-level Packaging (WLP), Chip-Scale Package (CSP) and QFN testing whereby those semiconductor’s devices are the next generation device for the purpose of to simplified the manufacturing process ultimately to reduce the manufacturing cost in total. The manufacturing cost in the semiconductor’s industry included of assembly cost and testing cost hence the said devices managed to simplified the assembly process and reduce the cost of assembly but if the testing-cost is not reduce in parallel, it will affected the profit margin. This study is important as a guideline for the semiconductor industry in terms of cost control to maintain the profit margin due to the depreciation of the average selling price (ASP) for past 20 years.