Controllers for DC to DC Boost Converters have evolved from simple control method to those that involve the use of fuzzy logic controllers. In many implementations, Proportional Integral Derivative (PID) controllers are commonly employed. In this paper, a genetic algorithm for tuning the PID controller of a DC to DC Boost Converter is hardware modelled and implemented on a Field Programmable Gate Array (FPGA) using Verilog as tool for the design entry. The goal of embedding genetic algorithm into the controller is to search for the best PID parameters that will yield fast settling time of the booster at an output of 6V. The hardware implementation allows the controller to tune itself by searching for the best Kp, Ki and Kd values that will give the best settling time. Significantly, this eliminates the need for a separate computer to do the searching routine. Test results of the circuit implemented yielded promising results. When compared to previous researches, the genetic algorithm employed yielded good PID parameters that resulted to a settling time as low as less than 60msec.